NIIN Output Data
NIIN:
NSN:
Item Name:
MICROCIRCUIT , DIGITAL
Definition:
A MICROCIRCUIT SPECIFICALLY DESIGNED TO GENERATE, MODIFY, OR PROCESS ELECTRICAL SIGNALS WHICH OPERATE WITH TWO DISTINCT OR BINARY STATES. THESE STATES ARE COMMONLY REFERRED TO AS ON AND OFF, TRUE AND FALSE, HIGH AND LOW, OR "1" AND "0".
Reference/Part Number
| Part Number | CAGE | Status | RNCC | RNVC | DAC | RNAAC | MSDS | SADC |
|---|---|---|---|---|---|---|---|---|
| SN54LS163J00 | 01295 | A | 3 | 9 | 3 | TX |
CAGE Information
| Code | Company |
|---|---|
| 01295 | TEXAS INSTRUMENTS INCORPORATED DBA T |
Federal Supply Class
Title
MICROCIRCUITS, ELECTRONIC
Inclusions:
INCLUDES INTEGRATED CIRCUIT DEVICES; INTEGRATED CIRCUIT MODULES, INTEGRATED ELECTRONIC DEVICES: HYBRID, MAGNETIC, MOLECULAR, OPTO-ELECTRONIC, AND THIN FILM.
Exclusions:
EXCLUDES SINGLE CIRCUIT ELEMENTS SUCH AS CAPACITORS; RESISTORS; DIODES AND TRANSISTORS; PRINTED CIRCUIT BOARDS AND CIRCUIT CARD ASSEMBLIES; AND FILTERS AND NETWORKS.
Characteristics (Decoded)
| MRC | Requirements Statement | Clear Text Reply |
|---|---|---|
| CQSZ | INCLOSURE CONFIGURATION | DUAL-IN-LINE |
| AFGA | OPERATING TEMP RANGE | -55.0/+125.0 DEG CELSIUS |
| CBBL | FEATURES PROVIDED | POSITIVE OUTPUTS AND PRESETTABLE AND EDGE TRIGGERED AND LOW POWER AND SCHOTTKY AND SYNCHRONOUS AND PROGRAMMABLE AND W/CLEAR AND HERMETICALLY SEALED AND MONOLITHIC AND W/ENABLE |
| CQZP | INPUT CIRCUIT PATTERN | 9 INPUT |
| CTFT | CASE OUTLINE SOURCE AND DESIGNATOR | -0-001-AG JOINT ELECTRON DEVICE ENGINEERING COUNCIL |
| AEHX | MAXIMUM POWER DISSIPATION RATING | 186.0 MILLIWATTS |
| ADAT | BODY WIDTH | 0.245 INCHES MINIMUM AND 0.300 INCHES MAXIMUM |
| ADAU | BODY HEIGHT | 0.120 INCHES MINIMUM AND 0.195 INCHES MAXIMUM |
| CZEN | VOLTAGE RATING AND TYPE PER CHARACTERISTIC | -1.5 VOLTS MINIMUM POWER SOURCE AND 5.5 VOLTS MAXIMUM POWER SOURCE |
| ADAQ | BODY LENGTH | 0.750 INCHES MINIMUM AND 0.795 INCHES MAXIMUM |
| AFJQ | STORAGE TEMP RANGE | -65.0/+150.0 DEG CELSIUS |
| CZEQ | TIME RATING PER CHACTERISTIC | 28.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 28.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT |
| CRHL | BIT QUANTITY (NON-CORE) | 4 |
| CSSL | DESIGN FUNCTION AND QUANTITY | 1 COUNTER, BINARY |
| TTQY | TERMINAL TYPE AND QUANTITY | 16 PRINTED CIRCUIT |
| CQSJ | INCLOSURE MATERIAL | CERAMIC AND GLASS |
| CQWX | OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| CWSG | TERMINAL SURFACE TREATMENT | SOLDER |