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Part Number:
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Item Name:
MICROCIRCUIT , LINEAR

Definition:

A MICROCIRCUIT WHOSE OUTPUT IS A FUNCTION OF THE INPUT; THAT IS, THE OUTPUT VARIES IN A PREDETERMINED AND ESSENTIALLY PREDICTABLE MANNER FROM THE INPUT SIGNAL.

CAGE Information

Code Company
06665 ANALOG DEVICES INC. DIV SANTA CLARA

Characteristics (Decoded)

MRC Requirements Statement Clear Text Reply
AFGA OPERATING TEMP RANGE -55.0/+125.0 DEG CELSIUS
ADAT BODY WIDTH 0.240 INCHES MINIMUM AND 0.260 INCHES MAXIMUM
CZEQ TIME RATING PER CHACTERISTIC 1200.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 1200.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT
AEHX MAXIMUM POWER DISSIPATION RATING 350.0 MILLIWATTS
ADAQ BODY LENGTH 0.280 INCHES MAXIMUM
CQSZ INCLOSURE CONFIGURATION FLAT PACK
AFJQ STORAGE TEMP RANGE -65.0/+150.0 DEG CELSIUS
ADAU BODY HEIGHT 0.030 INCHES MINIMUM AND 0.085 INCHES MAXIMUM
CBBL FEATURES PROVIDED HERMETICALLY SEALED AND MONOLITHIC AND NEGATIVE OUTPUTS AND POSITIVE OUTPUTS AND INTERNALLY COMPENSATED
CQZP INPUT CIRCUIT PATTERN DUAL 4 INPUT
CTFT CASE OUTLINE SOURCE AND DESIGNATOR F-1 MIL-M-38510
CQSJ INCLOSURE MATERIAL CERAMIC AND GLASS
TEST TEST DATA DOCUMENT 35351-154848 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING)
CSSL DESIGN FUNCTION AND QUANTITY 2 AMPLIFIER, OPERATIONAL, GENERAL PURPOSE
CWSG TERMINAL SURFACE TREATMENT SOLDER

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