Part Number
Part Number:
NSN:
NIIN:
Item Name:
MICROCIRCUIT , DIGITAL
Definition:
A MICROCIRCUIT SPECIFICALLY DESIGNED TO GENERATE, MODIFY, OR PROCESS ELECTRICAL SIGNALS WHICH OPERATE WITH TWO DISTINCT OR BINARY STATES. THESE STATES ARE COMMONLY REFERRED TO AS ON AND OFF, TRUE AND FALSE, HIGH AND LOW, OR "1" AND "0".
CAGE Information
| Code | Company |
|---|---|
| 11530 | LOCKHEED MARTIN CORPORATION DIV LOCK |
Federal Supply Class
Title
MICROCIRCUITS, ELECTRONIC
Inclusions:
INCLUDES INTEGRATED CIRCUIT DEVICES; INTEGRATED CIRCUIT MODULES, INTEGRATED ELECTRONIC DEVICES: HYBRID, MAGNETIC, MOLECULAR, OPTO-ELECTRONIC, AND THIN FILM.
Exclusions:
EXCLUDES SINGLE CIRCUIT ELEMENTS SUCH AS CAPACITORS; RESISTORS; DIODES AND TRANSISTORS; PRINTED CIRCUIT BOARDS AND CIRCUIT CARD ASSEMBLIES; AND FILTERS AND NETWORKS.
Characteristics (Decoded)
| MRC | Requirements Statement | Clear Text Reply |
|---|---|---|
| PMLC | PRECIOUS MATERIAL AND LOCATION | TERMINAL SURFACE GOLD |
| AFGA | OPERATING TEMP RANGE | -55.0/+125.0 DEG CELSIUS |
| PRMT | PRECIOUS MATERIAL | GOLD |
| CQSJ | INCLOSURE MATERIAL | GLASS AND METAL |
| CWSG | TERMINAL SURFACE TREATMENT | GOLD |
| ADAT | BODY WIDTH | 0.120 INCHES MINIMUM AND 0.150 INCHES MAXIMUM |
| CQSZ | INCLOSURE CONFIGURATION | FLAT PACK |
| TTQY | TERMINAL TYPE AND QUANTITY | 14 FLAT LEADS |
| AFJQ | STORAGE TEMP RANGE | -65.0/+150.0 DEG CELSIUS |
| CBBL | FEATURES PROVIDED | EXPANDABLE AND MONOLITHIC AND HERMETICALLY SEALED AND POSITIVE OUTPUTS |
| ADAU | BODY HEIGHT | 0.030 INCHES MINIMUM AND 0.070 INCHES MAXIMUM |
| CZEN | VOLTAGE RATING AND TYPE PER CHARACTERISTIC | 5.5 VOLTS MAXIMUM POWER SOURCE |
| CQZP | INPUT CIRCUIT PATTERN | DUAL 4 INPUT |
| ADAQ | BODY LENGTH | 0.240 INCHES MINIMUM AND 0.260 INCHES MAXIMUM |
| TEST | TEST DATA DOCUMENT | 11530-44-191514 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING) |
| CQWX | OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| CSSL | DESIGN FUNCTION AND QUANTITY | 2 GATE, AND-OR |
| CTFT | CASE OUTLINE SOURCE AND DESIGNATOR | T0-84 JOINT ELECTRON DEVICE ENGINEERING COUNCIL |