Part Number
Part Number:
NSN:
NIIN:
Item Name:
MICROCIRCUIT , DIGITAL
Definition:
A MICROCIRCUIT SPECIFICALLY DESIGNED TO GENERATE, MODIFY, OR PROCESS ELECTRICAL SIGNALS WHICH OPERATE WITH TWO DISTINCT OR BINARY STATES. THESE STATES ARE COMMONLY REFERRED TO AS ON AND OFF, TRUE AND FALSE, HIGH AND LOW, OR "1" AND "0".
CAGE Information
Code | Company |
---|---|
07263 | FAIRCHILD SEMICONDUCTOR CORP |
Federal Supply Class
Title
MICROCIRCUITS, ELECTRONIC
Inclusions:
INCLUDES INTEGRATED CIRCUIT DEVICES; INTEGRATED CIRCUIT MODULES, INTEGRATED ELECTRONIC DEVICES: HYBRID, MAGNETIC, MOLECULAR, OPTO-ELECTRONIC, AND THIN FILM.
Exclusions:
EXCLUDES SINGLE CIRCUIT ELEMENTS SUCH AS CAPACITORS; RESISTORS; DIODES AND TRANSISTORS; PRINTED CIRCUIT BOARDS AND CIRCUIT CARD ASSEMBLIES; AND FILTERS AND NETWORKS.
Characteristics (Decoded)
MRC | Requirements Statement | Clear Text Reply |
---|---|---|
CQSZ | INCLOSURE CONFIGURATION | DUAL-IN-LINE |
AFGA | OPERATING TEMP RANGE | -55.0/+125.0 DEG CELSIUS |
ADAT | BODY WIDTH | 0.245 INCHES MINIMUM AND 0.280 INCHES MAXIMUM |
ADAQ | BODY LENGTH | 0.755 INCHES MINIMUM AND 0.785 INCHES MAXIMUM |
CBBL | FEATURES PROVIDED | W/PRESET AND BURN IN AND HERMETICALLY SEALED AND W/CLOCK |
TTQY | TERMINAL TYPE AND QUANTITY | 14 PRINTED CIRCUIT |
CZEQ | TIME RATING PER CHACTERISTIC | 7.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 7.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT |
AFJQ | STORAGE TEMP RANGE | -65.0/+150.0 DEG CELSIUS |
CQSJ | INCLOSURE MATERIAL | CERAMIC |
AEHX | MAXIMUM POWER DISSIPATION RATING | 38.0 MILLIWATTS |
CZEN | VOLTAGE RATING AND TYPE PER CHARACTERISTIC | 7.0 VOLTS MAXIMUM POWER SOURCE |
CQZP | INPUT CIRCUIT PATTERN | DUAL 4 INPUT |
CQWX | OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
CSSL | DESIGN FUNCTION AND QUANTITY | 2 FLIP-FLOP, J-K |
ADAU | BODY HEIGHT | 0.180 INCHES MAXIMUM |
TEST | TEST DATA DOCUMENT | 96906-MIL-STD-883 STANDARD (INCLUDES INDUSTRY OR ASSOCIATION STANDARDS, INDIVIDUAL MANUFACTUREER STANDARDS, ETC.). |
CTFT | CASE OUTLINE SOURCE AND DESIGNATOR | TO-116 JOINT ELECTRON DEVICE ENGINEERING COUNCIL |
CWSG | TERMINAL SURFACE TREATMENT | SOLDER |