National Stock Number (NSN) Output Data
NSN:
NIIN:
Item Name:
MICROCIRCUIT , DIGITAL
Definition:
A MICROCIRCUIT SPECIFICALLY DESIGNED TO GENERATE, MODIFY, OR PROCESS ELECTRICAL SIGNALS WHICH OPERATE WITH TWO DISTINCT OR BINARY STATES. THESE STATES ARE COMMONLY REFERRED TO AS ON AND OFF, TRUE AND FALSE, HIGH AND LOW, OR "1" AND "0".
Reference/Part Number
Part Number | CAGE | Status | RNCC | RNVC | DAC | RNAAC | MSDS | SADC |
---|---|---|---|---|---|---|---|---|
SN7472 | 01295 | A | 5 | 9 | 2 | TA | ||
922460-1 | 06481 | A | 7 | 2 | 2 | TA | ||
SN7472W | 01295 | A | 3 | 2 | 3 | TX |
CAGE Information
Code | Company |
---|---|
01295 | TEXAS INSTRUMENTS INCORPORATED DBA T |
06481 | NORTHROP GRUMMAN GUIDANCE AND ELECTR |
Federal Supply Class
Title
MICROCIRCUITS, ELECTRONIC
Inclusions:
INCLUDES INTEGRATED CIRCUIT DEVICES; INTEGRATED CIRCUIT MODULES, INTEGRATED ELECTRONIC DEVICES: HYBRID, MAGNETIC, MOLECULAR, OPTO-ELECTRONIC, AND THIN FILM.
Exclusions:
EXCLUDES SINGLE CIRCUIT ELEMENTS SUCH AS CAPACITORS; RESISTORS; DIODES AND TRANSISTORS; PRINTED CIRCUIT BOARDS AND CIRCUIT CARD ASSEMBLIES; AND FILTERS AND NETWORKS.
Characteristics (Decoded)
MRC | Requirements Statement | Clear Text Reply |
---|---|---|
CBBL | FEATURES PROVIDED | HERMETICALLY SEALED AND W/CLEAR AND W/CLOCK AND W/PRESET |
CBBL | FEATURES PROVIDED | HERMETICALLY SEALED AND W/CLEAR AND W/CLOCK AND W/PRESET |
CQZP | INPUT CIRCUIT PATTERN | 9 INPUT |
AFGA | OPERATING TEMP RANGE | +0.0/+70.0 DEG CELSIUS |
ADAQ | BODY LENGTH | 0.250 INCHES MINIMUM AND 0.260 INCHES MAXIMUM |
ADAT | BODY WIDTH | 0.120 INCHES MINIMUM AND 0.150 INCHES MAXIMUM |
ADAU | BODY HEIGHT | 0.030 INCHES MINIMUM AND 0.050 INCHES MAXIMUM |
CSSL | DESIGN FUNCTION AND QUANTITY | 1 FLIP-FLOP, J-K, MASTER SLAVE |
CQSZ | INCLOSURE CONFIGURATION | FLAT PACK |
TTQY | TERMINAL TYPE AND QUANTITY | 14 FLAT LEADS |
AFJQ | STORAGE TEMP RANGE | -65.0/+150.0 DEG CELSIUS |
CZEN | VOLTAGE RATING AND TYPE PER CHARACTERISTIC | 5.5 VOLTS MAXIMUM POWER SOURCE |
CZEQ | TIME RATING PER CHACTERISTIC | 25.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 40.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT |
CQSJ | INCLOSURE MATERIAL | CERAMIC AND GLASS |
CQWX | OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
CWSG | TERMINAL SURFACE TREATMENT | SOLDER |
CTFT | CASE OUTLINE SOURCE AND DESIGNATOR | T0-84 JOINT ELECTRON DEVICE ENGINEERING COUNCIL |