Part Number
Part Number:
NSN:
NIIN:
Item Name:
MICROCIRCUIT , DIGITAL
Definition:
A MICROCIRCUIT SPECIFICALLY DESIGNED TO GENERATE, MODIFY, OR PROCESS ELECTRICAL SIGNALS WHICH OPERATE WITH TWO DISTINCT OR BINARY STATES. THESE STATES ARE COMMONLY REFERRED TO AS ON AND OFF, TRUE AND FALSE, HIGH AND LOW, OR "1" AND "0".
CAGE Information
| Code | Company |
|---|---|
| 03640 | LOCKHEED MARTIN CORPORATION DBA LOCK |
Characteristics (Decoded)
| MRC | Requirements Statement | Clear Text Reply |
|---|---|---|
| AFGA | OPERATING TEMP RANGE | -55.0/+125.0 DEG CELSIUS |
| AFGA | OPERATING TEMP RANGE | -55.0/+125.0 DEG CELSIUS |
| PMLC | PRECIOUS MATERIAL AND LOCATION | BODY AND TERMINAL SURFACES GOLD |
| PRMT | PRECIOUS MATERIAL | GOLD |
| TEST | TEST DATA DOCUMENT | 03640-6088479 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING) |
| ADAU | BODY HEIGHT | 0.035 INCHES MINIMUM AND 0.050 INCHES MAXIMUM |
| ADAQ | BODY LENGTH | 0.250 INCHES MINIMUM AND 0.260 INCHES MAXIMUM |
| CQSJ | INCLOSURE MATERIAL | GLASS AND METAL |
| CZEN | VOLTAGE RATING AND TYPE PER CHARACTERISTIC | -1.5 VOLTS MINIMUM POWER SOURCE AND 5.5 VOLTS MAXIMUM POWER SOURCE |
| CQSZ | INCLOSURE CONFIGURATION | FLAT PACK |
| TTQY | TERMINAL TYPE AND QUANTITY | 14 FLAT LEADS |
| AFJQ | STORAGE TEMP RANGE | -65.0/+150.0 DEG CELSIUS |
| CBBL | FEATURES PROVIDED | HERMETICALLY SEALED AND HIGH SPEED AND POSITIVE OUTPUTS AND MONOLITHIC AND W/OPEN COLLECTOR |
| CZEQ | TIME RATING PER CHACTERISTIC | 15.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 12.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT |
| AEHX | MAXIMUM POWER DISSIPATION RATING | 792.0 MILLIWATTS |
| CQWX | OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| CQZP | INPUT CIRCUIT PATTERN | QUAD 2 INPUT |
| ADAT | BODY WIDTH | 0.140 INCHES MINIMUM AND 0.150 INCHES MAXIMUM |
| CWSG | TERMINAL SURFACE TREATMENT | SOLDER |
| CSSL | DESIGN FUNCTION AND QUANTITY | 4 GATE, NAND |
| CTFT | CASE OUTLINE SOURCE AND DESIGNATOR | T0-84 JOINT ELECTRON DEVICE ENGINEERING COUNCIL |