Part Number
Part Number:
NSN:
NIIN:
Item Name:
MICROCIRCUIT , DIGITAL
Definition:
A MICROCIRCUIT SPECIFICALLY DESIGNED TO GENERATE, MODIFY, OR PROCESS ELECTRICAL SIGNALS WHICH OPERATE WITH TWO DISTINCT OR BINARY STATES. THESE STATES ARE COMMONLY REFERRED TO AS ON AND OFF, TRUE AND FALSE, HIGH AND LOW, OR "1" AND "0".
CAGE Information
| Code | Company |
|---|---|
| 03640 | LOCKHEED MARTIN CORPORATION DBA LOCK |
Federal Supply Class
Title
MICROCIRCUITS, ELECTRONIC
Inclusions:
INCLUDES INTEGRATED CIRCUIT DEVICES; INTEGRATED CIRCUIT MODULES, INTEGRATED ELECTRONIC DEVICES: HYBRID, MAGNETIC, MOLECULAR, OPTO-ELECTRONIC, AND THIN FILM.
Exclusions:
EXCLUDES SINGLE CIRCUIT ELEMENTS SUCH AS CAPACITORS; RESISTORS; DIODES AND TRANSISTORS; PRINTED CIRCUIT BOARDS AND CIRCUIT CARD ASSEMBLIES; AND FILTERS AND NETWORKS.
Characteristics (Decoded)
| MRC | Requirements Statement | Clear Text Reply |
|---|---|---|
| AFGA | OPERATING TEMP RANGE | -55.0/+125.0 DEG CELSIUS |
| ADAT | BODY WIDTH | 0.240 INCHES MINIMUM AND 0.260 INCHES MAXIMUM |
| AEHX | MAXIMUM POWER DISSIPATION RATING | 100.0 MILLIWATTS |
| CTFT | CASE OUTLINE SOURCE AND DESIGNATOR | T0-86 JOINT ELECTRON DEVICE ENGINEERING COUNCIL |
| TEST | TEST DATA DOCUMENT | 03640-6088504 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING) |
| CQSZ | INCLOSURE CONFIGURATION | FLAT PACK |
| CBBL | FEATURES PROVIDED | POSITIVE OUTPUTS AND MONOLITHIC AND HERMETICALLY SEALED AND HIGH SPEED |
| TTQY | TERMINAL TYPE AND QUANTITY | 14 FLAT LEADS |
| AFJQ | STORAGE TEMP RANGE | -65.0/+150.0 DEG CELSIUS |
| ADAU | BODY HEIGHT | 0.030 INCHES MINIMUM AND 0.070 INCHES MAXIMUM |
| CZEN | VOLTAGE RATING AND TYPE PER CHARACTERISTIC | 5.5 VOLTS MAXIMUM POWER SOURCE |
| CSSL | DESIGN FUNCTION AND QUANTITY | 1 DECODER, BINARY TO ONE OF EIGHT |
| CQSJ | INCLOSURE MATERIAL | CERAMIC AND GLASS |
| CQZP | INPUT CIRCUIT PATTERN | 4 INPUT |
| ADAQ | BODY LENGTH | 0.240 INCHES MINIMUM AND 0.275 INCHES MAXIMUM |
| CQWX | OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| CZEQ | TIME RATING PER CHACTERISTIC | 17.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 20.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT |
| CWSG | TERMINAL SURFACE TREATMENT | SOLDER |