Part Number
Part Number:
NSN:
NIIN:
Item Name:
MICROCIRCUIT , DIGITAL
Definition:
A MICROCIRCUIT SPECIFICALLY DESIGNED TO GENERATE, MODIFY, OR PROCESS ELECTRICAL SIGNALS WHICH OPERATE WITH TWO DISTINCT OR BINARY STATES. THESE STATES ARE COMMONLY REFERRED TO AS ON AND OFF, TRUE AND FALSE, HIGH AND LOW, OR "1" AND "0".
CAGE Information
| Code | Company |
|---|---|
| 80249 | BAE SYSTEMS INFORMATION AND ELECTRON |
Federal Supply Class
Title
MICROCIRCUITS, ELECTRONIC
Inclusions:
INCLUDES INTEGRATED CIRCUIT DEVICES; INTEGRATED CIRCUIT MODULES, INTEGRATED ELECTRONIC DEVICES: HYBRID, MAGNETIC, MOLECULAR, OPTO-ELECTRONIC, AND THIN FILM.
Exclusions:
EXCLUDES SINGLE CIRCUIT ELEMENTS SUCH AS CAPACITORS; RESISTORS; DIODES AND TRANSISTORS; PRINTED CIRCUIT BOARDS AND CIRCUIT CARD ASSEMBLIES; AND FILTERS AND NETWORKS.
Characteristics (Decoded)
| MRC | Requirements Statement | Clear Text Reply |
|---|---|---|
| TEST | TEST DATA DOCUMENT | 08783-37650021 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING) |
| TEST | TEST DATA DOCUMENT | 08783-37650021 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING) |
| CQSZ | INCLOSURE CONFIGURATION | DUAL-IN-LINE |
| CTFT | CASE OUTLINE SOURCE AND DESIGNATOR | T0-116 JOINT ELECTRON DEVICE ENGINEERING COUNCIL |
| AFGA | OPERATING TEMP RANGE | +0.0/+70.0 DEG CELSIUS |
| CQZP | INPUT CIRCUIT PATTERN | DUAL 2 WIDE 2 INPUT |
| ADAU | BODY HEIGHT | 0.140 INCHES MINIMUM AND 0.180 INCHES MAXIMUM |
| AFJQ | STORAGE TEMP RANGE | -65.0/+150.0 DEG CELSIUS |
| ADAT | BODY WIDTH | 0.220 INCHES MINIMUM AND 0.280 INCHES MAXIMUM |
| AEHX | MAXIMUM POWER DISSIPATION RATING | 255.0 MILLIWATTS |
| CQSJ | INCLOSURE MATERIAL | CERAMIC AND GLASS |
| CQWX | OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| CBBL | FEATURES PROVIDED | POSITIVE OUTPUTS AND MEDIUM POWER AND MEDIUM SPEED AND HERMETICALLY SEALED AND MONOLITHIC AND EXPANDABLE |
| CZEQ | TIME RATING PER CHACTERISTIC | 30.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 24.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT |
| CSSL | DESIGN FUNCTION AND QUANTITY | 2 GATE, AND-OR INVERT |
| ADAQ | BODY LENGTH | 0.660 INCHES MINIMUM AND 0.785 INCHES MAXIMUM |