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Part Number

Part Number:
NSN:
NIIN:
Item Name:
MICROCIRCUIT , DIGITAL

Definition:

A MICROCIRCUIT SPECIFICALLY DESIGNED TO GENERATE, MODIFY, OR PROCESS ELECTRICAL SIGNALS WHICH OPERATE WITH TWO DISTINCT OR BINARY STATES. THESE STATES ARE COMMONLY REFERRED TO AS ON AND OFF, TRUE AND FALSE, HIGH AND LOW, OR "1" AND "0".

CAGE Information

Code Company
42498 DAR ELECTRONICS INC DBA NATIONAL RAD

Federal Supply Class

Title

MICROCIRCUITS, ELECTRONIC

Inclusions:

INCLUDES INTEGRATED CIRCUIT DEVICES; INTEGRATED CIRCUIT MODULES, INTEGRATED ELECTRONIC DEVICES: HYBRID, MAGNETIC, MOLECULAR, OPTO-ELECTRONIC, AND THIN FILM.

Exclusions:

EXCLUDES SINGLE CIRCUIT ELEMENTS SUCH AS CAPACITORS; RESISTORS; DIODES AND TRANSISTORS; PRINTED CIRCUIT BOARDS AND CIRCUIT CARD ASSEMBLIES; AND FILTERS AND NETWORKS.

Characteristics (Decoded)

MRC Requirements Statement Clear Text Reply
AFGA OPERATING TEMP RANGE -55.0/+125.0 DEG CELSIUS
CQZP INPUT CIRCUIT PATTERN 5 INPUT
ADAT BODY WIDTH 0.240 INCHES MINIMUM AND 0.260 INCHES MAXIMUM
AEHX MAXIMUM POWER DISSIPATION RATING 174.0 MILLIWATTS
CQSZ INCLOSURE CONFIGURATION FLAT PACK
TTQY TERMINAL TYPE AND QUANTITY 14 FLAT LEADS
AFJQ STORAGE TEMP RANGE -65.0/+150.0 DEG CELSIUS
ADAU BODY HEIGHT 0.030 INCHES MINIMUM AND 0.070 INCHES MAXIMUM
CBBL FEATURES PROVIDED MONOLITHIC AND HERMETICALLY SEALED AND HIGH SPEED AND W/ENABLE AND AC COUPLED AND NEGATIVE OUTPUTS
CZEN VOLTAGE RATING AND TYPE PER CHARACTERISTIC 10.0 VOLTS MAXIMUM POWER SOURCE
ADAQ BODY LENGTH 0.240 INCHES MINIMUM AND 0.270 INCHES MAXIMUM
TEST TEST DATA DOCUMENT 42498-A43915 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING)
CQSJ INCLOSURE MATERIAL CERAMIC AND GLASS
CQWX OUTPUT LOGIC FORM TRANSISTOR-TRANSISTOR LOGIC
CZEQ TIME RATING PER CHACTERISTIC 8.50 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 8.50 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT
CSSL DESIGN FUNCTION AND QUANTITY 1 FLIP-FLOP, J-K, CLOCKED
CWSG TERMINAL SURFACE TREATMENT SOLDER

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