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Part Number

Part Number:
NSN:
NIIN:
Item Name:
MICROCIRCUIT , DIGITAL

Definition:

A MICROCIRCUIT SPECIFICALLY DESIGNED TO GENERATE, MODIFY, OR PROCESS ELECTRICAL SIGNALS WHICH OPERATE WITH TWO DISTINCT OR BINARY STATES. THESE STATES ARE COMMONLY REFERRED TO AS ON AND OFF, TRUE AND FALSE, HIGH AND LOW, OR "1" AND "0".

CAGE Information

Code Company
04713 FREESCALE SEMICONDUCTOR INC.

Federal Supply Class

Title

MICROCIRCUITS, ELECTRONIC

Inclusions:

INCLUDES INTEGRATED CIRCUIT DEVICES; INTEGRATED CIRCUIT MODULES, INTEGRATED ELECTRONIC DEVICES: HYBRID, MAGNETIC, MOLECULAR, OPTO-ELECTRONIC, AND THIN FILM.

Exclusions:

EXCLUDES SINGLE CIRCUIT ELEMENTS SUCH AS CAPACITORS; RESISTORS; DIODES AND TRANSISTORS; PRINTED CIRCUIT BOARDS AND CIRCUIT CARD ASSEMBLIES; AND FILTERS AND NETWORKS.

Characteristics (Decoded)

MRC Requirements Statement Clear Text Reply
AFGA OPERATING TEMP RANGE -55.0/+125.0 DEG CELSIUS
AFGA OPERATING TEMP RANGE -55.0/+125.0 DEG CELSIUS
PRMT PRECIOUS MATERIAL GOLD
AFJQ STORAGE TEMP RANGE -65.0/+200.0 DEG CELSIUS
AEHX MAXIMUM POWER DISSIPATION RATING 220.0 MILLIWATTS
CTFT CASE OUTLINE SOURCE AND DESIGNATOR T0-85 JOINT ELECTRON DEVICE ENGINEERING COUNCIL
TEST TEST DATA DOCUMENT 13499-351-7335 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING)
CZEQ TIME RATING PER CHACTERISTIC 20.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 20.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT
CQSZ INCLOSURE CONFIGURATION FLAT PACK
PMLC PRECIOUS MATERIAL AND LOCATION TERMINALS GOLD
ADAU BODY HEIGHT 0.030 INCHES MINIMUM AND 0.070 INCHES MAXIMUM
CBBL FEATURES PROVIDED MEDIUM POWER AND MEDIUM SPEED AND NEGATIVE EDGE TRIGGERED AND POSITIVE OUTPUTS AND HERMETICALLY SEALED AND MONOLITHIC AND RESETTABLE AND W/ENABLE
CQSJ INCLOSURE MATERIAL CERAMIC AND GLASS
ADAQ BODY LENGTH 0.240 INCHES MINIMUM AND 0.275 INCHES MAXIMUM
CQWX OUTPUT LOGIC FORM TRANSISTOR-TRANSISTOR LOGIC
CQZP INPUT CIRCUIT PATTERN 8 INPUT
CSSL DESIGN FUNCTION AND QUANTITY 2 FLIP-FLOP, J-K, CLOCKED
ADAT BODY WIDTH 0.160 INCHES MINIMUM AND 0.185 INCHES MAXIMUM

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