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Part Number

Part Number:
NSN:
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Item Name:
MICROCIRCUIT , DIGITAL

Definition:

A MICROCIRCUIT SPECIFICALLY DESIGNED TO GENERATE, MODIFY, OR PROCESS ELECTRICAL SIGNALS WHICH OPERATE WITH TWO DISTINCT OR BINARY STATES. THESE STATES ARE COMMONLY REFERRED TO AS ON AND OFF, TRUE AND FALSE, HIGH AND LOW, OR "1" AND "0".

CAGE Information

Code Company
27014 NATIONAL SEMICONDUCTOR CORPORATION

Federal Supply Class

Title

MICROCIRCUITS, ELECTRONIC

Inclusions:

INCLUDES INTEGRATED CIRCUIT DEVICES; INTEGRATED CIRCUIT MODULES, INTEGRATED ELECTRONIC DEVICES: HYBRID, MAGNETIC, MOLECULAR, OPTO-ELECTRONIC, AND THIN FILM.

Exclusions:

EXCLUDES SINGLE CIRCUIT ELEMENTS SUCH AS CAPACITORS; RESISTORS; DIODES AND TRANSISTORS; PRINTED CIRCUIT BOARDS AND CIRCUIT CARD ASSEMBLIES; AND FILTERS AND NETWORKS.

Characteristics (Decoded)

MRC Requirements Statement Clear Text Reply
AFGA OPERATING TEMP RANGE -55.0/+125.0 DEG CELSIUS
ADAU BODY HEIGHT 0.035 INCHES MINIMUM AND 0.050 INCHES MAXIMUM
CQSJ INCLOSURE MATERIAL GLASS AND METAL
AEHX MAXIMUM POWER DISSIPATION RATING 4.0 MILLIWATTS
CQSZ INCLOSURE CONFIGURATION FLAT PACK
TTQY TERMINAL TYPE AND QUANTITY 14 FLAT LEADS
AFJQ STORAGE TEMP RANGE -65.0/+150.0 DEG CELSIUS
CBBL FEATURES PROVIDED MONOLITHIC AND POSITIVE OUTPUTS AND LOW POWER AND HERMETICALLY SEALED AND W/TOTEM POLE OUTPUT
CZEN VOLTAGE RATING AND TYPE PER CHARACTERISTIC 5.5 VOLTS MAXIMUM POWER SOURCE
TEST TEST DATA DOCUMENT 35351-151534 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING)
ADAQ BODY LENGTH 0.240 INCHES MINIMUM AND 0.260 INCHES MAXIMUM
CQWX OUTPUT LOGIC FORM TRANSISTOR-TRANSISTOR LOGIC
CQZP INPUT CIRCUIT PATTERN QUAD 2 INPUT
ADAT BODY WIDTH 0.140 INCHES MINIMUM AND 0.150 INCHES MAXIMUM
CZEQ TIME RATING PER CHACTERISTIC 60.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT
CWSG TERMINAL SURFACE TREATMENT SOLDER
CSSL DESIGN FUNCTION AND QUANTITY 4 GATE, NAND
CTFT CASE OUTLINE SOURCE AND DESIGNATOR T0-84 JOINT ELECTRON DEVICE ENGINEERING COUNCIL

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