Part Number
Part Number:
NSN:
NIIN:
Item Name:
MICROCIRCUIT , DIGITAL
Definition:
A MICROCIRCUIT SPECIFICALLY DESIGNED TO GENERATE, MODIFY, OR PROCESS ELECTRICAL SIGNALS WHICH OPERATE WITH TWO DISTINCT OR BINARY STATES. THESE STATES ARE COMMONLY REFERRED TO AS ON AND OFF, TRUE AND FALSE, HIGH AND LOW, OR "1" AND "0".
CAGE Information
| Code | Company |
|---|---|
| 07263 | FAIRCHILD SEMICONDUCTOR CORP |
Federal Supply Class
Title
MICROCIRCUITS, ELECTRONIC
Inclusions:
INCLUDES INTEGRATED CIRCUIT DEVICES; INTEGRATED CIRCUIT MODULES, INTEGRATED ELECTRONIC DEVICES: HYBRID, MAGNETIC, MOLECULAR, OPTO-ELECTRONIC, AND THIN FILM.
Exclusions:
EXCLUDES SINGLE CIRCUIT ELEMENTS SUCH AS CAPACITORS; RESISTORS; DIODES AND TRANSISTORS; PRINTED CIRCUIT BOARDS AND CIRCUIT CARD ASSEMBLIES; AND FILTERS AND NETWORKS.
Characteristics (Decoded)
| MRC | Requirements Statement | Clear Text Reply |
|---|---|---|
| AFGA | OPERATING TEMP RANGE | -55.0/+125.0 DEG CELSIUS |
| PRMT | PRECIOUS MATERIAL | GOLD |
| ADAT | BODY WIDTH | 0.247 INCHES MINIMUM AND 0.283 INCHES MAXIMUM |
| AEHX | MAXIMUM POWER DISSIPATION RATING | 40.0 MILLIWATTS |
| CBBL | FEATURES PROVIDED | HERMETICALLY SEALED AND HIGH SPEED AND POSITIVE OUTPUTS AND MONOLITHIC AND COMPLEMENTARY OUTPUTS |
| CQSZ | INCLOSURE CONFIGURATION | FLAT PACK |
| PMLC | PRECIOUS MATERIAL AND LOCATION | TERMINALS GOLD |
| AFJQ | STORAGE TEMP RANGE | -65.0/+150.0 DEG CELSIUS |
| CZEN | VOLTAGE RATING AND TYPE PER CHARACTERISTIC | -0.5 VOLTS MINIMUM POWER SOURCE AND 5.5 VOLTS MAXIMUM PAC IDENTIFICATION OUTPUT |
| ADAQ | BODY LENGTH | 0.371 INCHES MINIMUM AND 0.409 INCHES MAXIMUM |
| ADAU | BODY HEIGHT | 0.065 INCHES MINIMUM AND 0.090 INCHES MAXIMUM |
| CQSJ | INCLOSURE MATERIAL | CERAMIC AND GLASS |
| CQWX | OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| CQZP | INPUT CIRCUIT PATTERN | QUAD 2 INPUT |
| TEST | TEST DATA DOCUMENT | 96906-MIL-STD-883 STANDARD (INCLUDES INDUSTRY OR ASSOCIATION STANDARDS, INDIVIDUAL MANUFACTUREER STANDARDS, ETC.). |
| TTQY | TERMINAL TYPE AND QUANTITY | 16 FLAT LEADS |
| CSSL | DESIGN FUNCTION AND QUANTITY | 4 GATE, EXCLUSIVE OR |
| CZEQ | TIME RATING PER CHACTERISTIC | 26.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 26.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT |
| CWSG | TERMINAL SURFACE TREATMENT | SOLDER |