Part Number
Part Number:
NSN:
NIIN:
Item Name:
MICROCIRCUIT , DIGITAL
Definition:
A MICROCIRCUIT SPECIFICALLY DESIGNED TO GENERATE, MODIFY, OR PROCESS ELECTRICAL SIGNALS WHICH OPERATE WITH TWO DISTINCT OR BINARY STATES. THESE STATES ARE COMMONLY REFERRED TO AS ON AND OFF, TRUE AND FALSE, HIGH AND LOW, OR "1" AND "0".
CAGE Information
| Code | Company |
|---|---|
| 01295 | TEXAS INSTRUMENTS INCORPORATED DBA T |
Characteristics (Decoded)
| MRC | Requirements Statement | Clear Text Reply |
|---|---|---|
| FEAT | SPECIAL FEATURES | FORMED LEADS |
| FEAT | SPECIAL FEATURES | FORMED LEADS |
| CRHL | BIT QUANTITY (NON-CORE) | 20 |
| AFGA | OPERATING TEMP RANGE | -55.0/+125.0 DEG CELSIUS |
| PRMT | PRECIOUS MATERIAL | GOLD |
| CQSJ | INCLOSURE MATERIAL | GLASS AND METAL |
| CWSG | TERMINAL SURFACE TREATMENT | GOLD |
| ADAT | BODY WIDTH | 0.120 INCHES MINIMUM AND 0.150 INCHES MAXIMUM |
| AEHX | MAXIMUM POWER DISSIPATION RATING | 40.0 MILLIWATTS |
| CQSZ | INCLOSURE CONFIGURATION | FLAT PACK |
| TTQY | TERMINAL TYPE AND QUANTITY | 14 FLAT LEADS |
| AFJQ | STORAGE TEMP RANGE | -65.0/+150.0 DEG CELSIUS |
| ADAU | BODY HEIGHT | 0.030 INCHES MINIMUM AND 0.070 INCHES MAXIMUM |
| ADAQ | BODY LENGTH | 0.240 INCHES MINIMUM AND 0.260 INCHES MAXIMUM |
| CZEN | VOLTAGE RATING AND TYPE PER CHARACTERISTIC | -0.5 VOLTS MINIMUM POWER SOURCE AND 5.5 VOLTS MAXIMUM POWER SOURCE |
| CQWX | OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| PMLC | PRECIOUS MATERIAL AND LOCATION | TERMINALS AND BODY SURFACE GOLD |
| CQZP | INPUT CIRCUIT PATTERN | QUAD 2 INPUT |
| TEST | TEST DATA DOCUMENT | 80063-SM-B-586398 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING) |
| CBBL | FEATURES PROVIDED | POSITIVE OUTPUTS AND HERMETICALLY SEALED AND MONOLITHIC AND LOW LEVEL |
| CZEQ | TIME RATING PER CHACTERISTIC | 29.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 15.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT |
| CSSL | DESIGN FUNCTION AND QUANTITY | 4 GATE, NAND |
| CTFT | CASE OUTLINE SOURCE AND DESIGNATOR | T0-84 JOINT ELECTRON DEVICE ENGINEERING COUNCIL |