Part Number
Part Number:
NSN:
NIIN:
Item Name:
MICROCIRCUIT , DIGITAL
Definition:
A MICROCIRCUIT SPECIFICALLY DESIGNED TO GENERATE, MODIFY, OR PROCESS ELECTRICAL SIGNALS WHICH OPERATE WITH TWO DISTINCT OR BINARY STATES. THESE STATES ARE COMMONLY REFERRED TO AS ON AND OFF, TRUE AND FALSE, HIGH AND LOW, OR "1" AND "0".
CAGE Information
Code | Company |
---|---|
C4751 | EPCOS AG |
Federal Supply Class
Title
MICROCIRCUITS, ELECTRONIC
Inclusions:
INCLUDES INTEGRATED CIRCUIT DEVICES; INTEGRATED CIRCUIT MODULES, INTEGRATED ELECTRONIC DEVICES: HYBRID, MAGNETIC, MOLECULAR, OPTO-ELECTRONIC, AND THIN FILM.
Exclusions:
EXCLUDES SINGLE CIRCUIT ELEMENTS SUCH AS CAPACITORS; RESISTORS; DIODES AND TRANSISTORS; PRINTED CIRCUIT BOARDS AND CIRCUIT CARD ASSEMBLIES; AND FILTERS AND NETWORKS.
Characteristics (Decoded)
MRC | Requirements Statement | Clear Text Reply |
---|---|---|
CQSZ | INCLOSURE CONFIGURATION | DUAL-IN-LINE |
AFGA | OPERATING TEMP RANGE | -55.0/+125.0 DEG CELSIUS |
CQZP | INPUT CIRCUIT PATTERN | DUAL 5 INPUT |
CBBL | FEATURES PROVIDED | NEGATIVE EDGE TRIGGERED AND SCHOTTKY AND PRESETTABLE AND HIGH SPEED AND POSITIVE OUTPUTS AND MONOLITHIC AND HERMETICALLY SEALED AND W/CLEAR |
TEST | TEST DATA DOCUMENT | 07187-4008228 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING) |
CTFT | CASE OUTLINE SOURCE AND DESIGNATOR | -0-001-AG JOINT ELECTRON DEVICE ENGINEERING COUNCIL |
AEHX | MAXIMUM POWER DISSIPATION RATING | 274.0 MILLIWATTS |
ADAT | BODY WIDTH | 0.245 INCHES MINIMUM AND 0.300 INCHES MAXIMUM |
ADAU | BODY HEIGHT | 0.120 INCHES MINIMUM AND 0.195 INCHES MAXIMUM |
ADAQ | BODY LENGTH | 0.750 INCHES MINIMUM AND 0.795 INCHES MAXIMUM |
AFJQ | STORAGE TEMP RANGE | -65.0/+150.0 DEG CELSIUS |
CQSJ | INCLOSURE MATERIAL | CERAMIC AND GLASS |
CQWX | OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
CZEQ | TIME RATING PER CHACTERISTIC | 11.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 11.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT |
CSSL | DESIGN FUNCTION AND QUANTITY | 2 FLIP-FLOP, J-K, CLOCKED |