Part Number
Part Number:
NSN:
NIIN:
Item Name:
MICROCIRCUIT , DIGITAL
Definition:
A MICROCIRCUIT SPECIFICALLY DESIGNED TO GENERATE, MODIFY, OR PROCESS ELECTRICAL SIGNALS WHICH OPERATE WITH TWO DISTINCT OR BINARY STATES. THESE STATES ARE COMMONLY REFERRED TO AS ON AND OFF, TRUE AND FALSE, HIGH AND LOW, OR "1" AND "0".
CAGE Information
| Code | Company |
|---|---|
| 04713 | FREESCALE SEMICONDUCTOR INC. |
Federal Supply Class
Title
MICROCIRCUITS, ELECTRONIC
Inclusions:
INCLUDES INTEGRATED CIRCUIT DEVICES; INTEGRATED CIRCUIT MODULES, INTEGRATED ELECTRONIC DEVICES: HYBRID, MAGNETIC, MOLECULAR, OPTO-ELECTRONIC, AND THIN FILM.
Exclusions:
EXCLUDES SINGLE CIRCUIT ELEMENTS SUCH AS CAPACITORS; RESISTORS; DIODES AND TRANSISTORS; PRINTED CIRCUIT BOARDS AND CIRCUIT CARD ASSEMBLIES; AND FILTERS AND NETWORKS.
Characteristics (Decoded)
| MRC | Requirements Statement | Clear Text Reply |
|---|---|---|
| AFJQ | STORAGE TEMP RANGE | -65.0/+200.0 DEG CELSIUS |
| AFJQ | STORAGE TEMP RANGE | -65.0/+200.0 DEG CELSIUS |
| CTFT | CASE OUTLINE SOURCE AND DESIGNATOR | T0-85 JOINT ELECTRON DEVICE ENGINEERING COUNCIL |
| CQZP | INPUT CIRCUIT PATTERN | 7 INPUT |
| CZEN | VOLTAGE RATING AND TYPE PER CHARACTERISTIC | -1.5 VOLTS MINIMUM POWER SOURCE AND 5.5 VOLTS MAXIMUM POWER SOURCE |
| CQSZ | INCLOSURE CONFIGURATION | FLAT PACK |
| TTQY | TERMINAL TYPE AND QUANTITY | 14 FLAT LEADS |
| ADAU | BODY HEIGHT | 0.030 INCHES MINIMUM AND 0.070 INCHES MAXIMUM |
| CRHL | BIT QUANTITY (NON-CORE) | 4 |
| AEHX | MAXIMUM POWER DISSIPATION RATING | 200.0 MILLIWATTS |
| CSSL | DESIGN FUNCTION AND QUANTITY | 1 COUNTER, BINARY |
| ADAT | BODY WIDTH | 0.165 INCHES MINIMUM AND 0.195 INCHES MAXIMUM |
| CQSJ | INCLOSURE MATERIAL | CERAMIC AND GLASS |
| ADAQ | BODY LENGTH | 0.240 INCHES MINIMUM AND 0.275 INCHES MAXIMUM |
| CQWX | OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| AFGA | OPERATING TEMP RANGE | +0.0/+75.0 DEG CELSIUS |
| CZEQ | TIME RATING PER CHACTERISTIC | 30.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 30.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT |
| TEST | TEST DATA DOCUMENT | 05869-717360-13 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING) |
| CBBL | FEATURES PROVIDED | MONOLITHIC AND POSITIVE OUTPUTS AND W/ENABLE AND HERMETICALLY SEALED AND RESETTABLE |
| CWSG | TERMINAL SURFACE TREATMENT | SOLDER |