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Part Number

Part Number:
NSN:
NIIN:
Item Name:
MICROCIRCUIT , DIGITAL

Definition:

A MICROCIRCUIT SPECIFICALLY DESIGNED TO GENERATE, MODIFY, OR PROCESS ELECTRICAL SIGNALS WHICH OPERATE WITH TWO DISTINCT OR BINARY STATES. THESE STATES ARE COMMONLY REFERRED TO AS ON AND OFF, TRUE AND FALSE, HIGH AND LOW, OR "1" AND "0".

CAGE Information

Code Company
3V146 ROCHESTER ELECTRONICS LLC

Federal Supply Class

Title

MICROCIRCUITS, ELECTRONIC

Inclusions:

INCLUDES INTEGRATED CIRCUIT DEVICES; INTEGRATED CIRCUIT MODULES, INTEGRATED ELECTRONIC DEVICES: HYBRID, MAGNETIC, MOLECULAR, OPTO-ELECTRONIC, AND THIN FILM.

Exclusions:

EXCLUDES SINGLE CIRCUIT ELEMENTS SUCH AS CAPACITORS; RESISTORS; DIODES AND TRANSISTORS; PRINTED CIRCUIT BOARDS AND CIRCUIT CARD ASSEMBLIES; AND FILTERS AND NETWORKS.

Characteristics (Decoded)

MRC Requirements Statement Clear Text Reply
PMLC PRECIOUS MATERIAL AND LOCATION TERMINAL SURFACE GOLD
PMLC PRECIOUS MATERIAL AND LOCATION TERMINAL SURFACE GOLD
AFGA OPERATING TEMP RANGE -55.0/+125.0 DEG CELSIUS
PRMT PRECIOUS MATERIAL GOLD
ADAT BODY WIDTH 0.240 INCHES MINIMUM AND 0.260 INCHES MAXIMUM
CQSJ INCLOSURE MATERIAL GLASS AND METAL
CWSG TERMINAL SURFACE TREATMENT GOLD
CZEN VOLTAGE RATING AND TYPE PER CHARACTERISTIC -1.5 VOLTS MINIMUM POWER SOURCE AND 5.5 VOLTS MAXIMUM POWER SOURCE
CQSZ INCLOSURE CONFIGURATION FLAT PACK
TTQY TERMINAL TYPE AND QUANTITY 14 FLAT LEADS
AFJQ STORAGE TEMP RANGE -65.0/+150.0 DEG CELSIUS
CBBL FEATURES PROVIDED HERMETICALLY SEALED AND MONOLITHIC AND POSITIVE OUTPUTS AND PRESETTABLE AND W/ENABLE AND W/CLEAR AND MEDIUM SPEED AND W/BUFFERED OUTPUT
ADAU BODY HEIGHT 0.030 INCHES MINIMUM AND 0.070 INCHES MAXIMUM
CZEQ TIME RATING PER CHACTERISTIC 35.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 50.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT
TEST TEST DATA DOCUMENT 88818-C528000277 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING)
CSSL DESIGN FUNCTION AND QUANTITY 2 FLIP-FLOP, CLOCKED AND 2 FLIP-FLOP, D-TYPE
CQZP INPUT CIRCUIT PATTERN DUAL 4 INPUT
ADAQ BODY LENGTH 0.240 INCHES MINIMUM AND 0.270 INCHES MAXIMUM
CQWX OUTPUT LOGIC FORM TRANSISTOR-TRANSISTOR LOGIC

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