Part Number
Part Number:
NSN:
NIIN:
Item Name:
MICROCIRCUIT , DIGITAL
Definition:
A MICROCIRCUIT SPECIFICALLY DESIGNED TO GENERATE, MODIFY, OR PROCESS ELECTRICAL SIGNALS WHICH OPERATE WITH TWO DISTINCT OR BINARY STATES. THESE STATES ARE COMMONLY REFERRED TO AS ON AND OFF, TRUE AND FALSE, HIGH AND LOW, OR "1" AND "0".
CAGE Information
| Code | Company |
|---|---|
| 80063 | US ARMY COMMUNICATIONS & ELECTRONICS |
Federal Supply Class
Title
MICROCIRCUITS, ELECTRONIC
Inclusions:
INCLUDES INTEGRATED CIRCUIT DEVICES; INTEGRATED CIRCUIT MODULES, INTEGRATED ELECTRONIC DEVICES: HYBRID, MAGNETIC, MOLECULAR, OPTO-ELECTRONIC, AND THIN FILM.
Exclusions:
EXCLUDES SINGLE CIRCUIT ELEMENTS SUCH AS CAPACITORS; RESISTORS; DIODES AND TRANSISTORS; PRINTED CIRCUIT BOARDS AND CIRCUIT CARD ASSEMBLIES; AND FILTERS AND NETWORKS.
Characteristics (Decoded)
| MRC | Requirements Statement | Clear Text Reply |
|---|---|---|
| CQSZ | INCLOSURE CONFIGURATION | DUAL-IN-LINE |
| CQSZ | INCLOSURE CONFIGURATION | DUAL-IN-LINE |
| PMLC | PRECIOUS MATERIAL AND LOCATION | TERMINAL SURFACE GOLD |
| AFGA | OPERATING TEMP RANGE | -55.0/+125.0 DEG CELSIUS |
| PRMT | PRECIOUS MATERIAL | GOLD |
| TTQY | TERMINAL TYPE AND QUANTITY | 14 PRINTED CIRCUIT |
| CZEQ | TIME RATING PER CHACTERISTIC | 50.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 35.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT |
| CWSG | TERMINAL SURFACE TREATMENT | GOLD |
| TEST | TEST DATA DOCUMENT | 00752-394703 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING) |
| ADAU | BODY HEIGHT | 0.140 INCHES MINIMUM AND 0.180 INCHES MAXIMUM |
| AFJQ | STORAGE TEMP RANGE | -65.0/+150.0 DEG CELSIUS |
| CZEN | VOLTAGE RATING AND TYPE PER CHARACTERISTIC | 7.0 VOLTS MAXIMUM POWER SOURCE |
| CSSL | DESIGN FUNCTION AND QUANTITY | 2 FLIP-FLOP, CLOCKED AND 2 FLIP-FLOP, D-TYPE |
| ADAT | BODY WIDTH | 0.220 INCHES MINIMUM AND 0.280 INCHES MAXIMUM |
| CQZP | INPUT CIRCUIT PATTERN | DUAL 4 INPUT |
| CQSJ | INCLOSURE MATERIAL | CERAMIC AND GLASS |
| CQWX | OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| CTFT | CASE OUTLINE SOURCE AND DESIGNATOR | TO-116 JOINT ELECTRON DEVICE ENGINEERING COUNCIL |
| AEHX | MAXIMUM POWER DISSIPATION RATING | 1.25 WATTS |
| CBBL | FEATURES PROVIDED | W/CLEAR AND DUAL EDGE TRIGGERED AND EDGE TRIGGERED AND HERMETICALLY SEALED AND MONOLITHIC AND PRESETTABLE AND POSITIVE OUTPUTS AND W/ENABLE |
| ADAQ | BODY LENGTH | 0.660 INCHES MINIMUM AND 0.785 INCHES MAXIMUM |