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Part Number

Part Number:
NSN:
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Item Name:
MICROCIRCUIT , DIGITAL

Definition:

A MICROCIRCUIT SPECIFICALLY DESIGNED TO GENERATE, MODIFY, OR PROCESS ELECTRICAL SIGNALS WHICH OPERATE WITH TWO DISTINCT OR BINARY STATES. THESE STATES ARE COMMONLY REFERRED TO AS ON AND OFF, TRUE AND FALSE, HIGH AND LOW, OR "1" AND "0".

CAGE Information

Code Company
01295 TEXAS INSTRUMENTS INCORPORATED DBA T

Federal Supply Class

Title

MICROCIRCUITS, ELECTRONIC

Inclusions:

INCLUDES INTEGRATED CIRCUIT DEVICES; INTEGRATED CIRCUIT MODULES, INTEGRATED ELECTRONIC DEVICES: HYBRID, MAGNETIC, MOLECULAR, OPTO-ELECTRONIC, AND THIN FILM.

Exclusions:

EXCLUDES SINGLE CIRCUIT ELEMENTS SUCH AS CAPACITORS; RESISTORS; DIODES AND TRANSISTORS; PRINTED CIRCUIT BOARDS AND CIRCUIT CARD ASSEMBLIES; AND FILTERS AND NETWORKS.

Characteristics (Decoded)

MRC Requirements Statement Clear Text Reply
CQSZ INCLOSURE CONFIGURATION DUAL-IN-LINE
AFGA OPERATING TEMP RANGE -55.0/+125.0 DEG CELSIUS
PRMT PRECIOUS MATERIAL SILVER
CTFT CASE OUTLINE SOURCE AND DESIGNATOR T0-116 JOINT ELECTRON DEVICE ENGINEERING COUNCIL
PMLC PRECIOUS MATERIAL AND LOCATION TERMINAL SURFACE SILVER
ADAU BODY HEIGHT 0.140 INCHES MINIMUM AND 0.180 INCHES MAXIMUM
TEST TEST DATA DOCUMENT 12909-401216 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING)
AFJQ STORAGE TEMP RANGE -65.0/+150.0 DEG CELSIUS
CBBL FEATURES PROVIDED MEDIUM POWER AND MEDIUM SPEED AND MONOLITHIC AND POSITIVE OUTPUTS AND W/TOTEM POLE OUTPUT
ADAT BODY WIDTH 0.220 INCHES MINIMUM AND 0.280 INCHES MAXIMUM
CQWX OUTPUT LOGIC FORM TRANSISTOR-TRANSISTOR LOGIC
CQZP INPUT CIRCUIT PATTERN QUAD 2 INPUT
AEHX MAXIMUM POWER DISSIPATION RATING 160.0 MILLIWATTS
CQSJ INCLOSURE MATERIAL PLASTIC
CZEQ TIME RATING PER CHACTERISTIC 22.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 15.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT
CSSL DESIGN FUNCTION AND QUANTITY 4 GATE, NAND
ADAQ BODY LENGTH 0.660 INCHES MINIMUM AND 0.785 INCHES MAXIMUM

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