Part Number
Part Number:
NSN:
NIIN:
Item Name:
MICROCIRCUIT , DIGITAL
Definition:
A MICROCIRCUIT SPECIFICALLY DESIGNED TO GENERATE, MODIFY, OR PROCESS ELECTRICAL SIGNALS WHICH OPERATE WITH TWO DISTINCT OR BINARY STATES. THESE STATES ARE COMMONLY REFERRED TO AS ON AND OFF, TRUE AND FALSE, HIGH AND LOW, OR "1" AND "0".
CAGE Information
Code | Company |
---|---|
01295 | TEXAS INSTRUMENTS INCORPORATED DBA T |
Federal Supply Class
Title
MICROCIRCUITS, ELECTRONIC
Inclusions:
INCLUDES INTEGRATED CIRCUIT DEVICES; INTEGRATED CIRCUIT MODULES, INTEGRATED ELECTRONIC DEVICES: HYBRID, MAGNETIC, MOLECULAR, OPTO-ELECTRONIC, AND THIN FILM.
Exclusions:
EXCLUDES SINGLE CIRCUIT ELEMENTS SUCH AS CAPACITORS; RESISTORS; DIODES AND TRANSISTORS; PRINTED CIRCUIT BOARDS AND CIRCUIT CARD ASSEMBLIES; AND FILTERS AND NETWORKS.
Characteristics (Decoded)
MRC | Requirements Statement | Clear Text Reply |
---|---|---|
FEAT | SPECIAL FEATURES | FORMED LEADS |
FEAT | SPECIAL FEATURES | FORMED LEADS |
AFGA | OPERATING TEMP RANGE | -55.0/+125.0 DEG CELSIUS |
CBBL | FEATURES PROVIDED | MONOLITHIC AND HERMETICALLY SEALED AND POSITIVE OUTPUTS AND W/TOTEM POLE OUTPUT |
ADAU | BODY HEIGHT | 0.035 INCHES MINIMUM AND 0.050 INCHES MAXIMUM |
ADAQ | BODY LENGTH | 0.250 INCHES MINIMUM AND 0.260 INCHES MAXIMUM |
CQSJ | INCLOSURE MATERIAL | GLASS AND METAL |
CWSG | TERMINAL SURFACE TREATMENT | GOLD |
AEHX | MAXIMUM POWER DISSIPATION RATING | 40.0 MILLIWATTS |
CQSZ | INCLOSURE CONFIGURATION | FLAT PACK |
TTQY | TERMINAL TYPE AND QUANTITY | 14 FLAT LEADS |
AFJQ | STORAGE TEMP RANGE | -65.0/+150.0 DEG CELSIUS |
CZEN | VOLTAGE RATING AND TYPE PER CHARACTERISTIC | 5.5 VOLTS MAXIMUM POWER SOURCE |
CZEQ | TIME RATING PER CHACTERISTIC | 22.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT |
CQWX | OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
CQZP | INPUT CIRCUIT PATTERN | QUAD 2 INPUT |
PMLC | PRECIOUS MATERIAL AND LOCATION | TERMINALS GOLD AND BODY GOLD |
ADAT | BODY WIDTH | 0.140 INCHES MINIMUM AND 0.150 INCHES MAXIMUM |
CSSL | DESIGN FUNCTION AND QUANTITY | 4 GATE, NAND |
CTFT | CASE OUTLINE SOURCE AND DESIGNATOR | T0-84 JOINT ELECTRON DEVICE ENGINEERING COUNCIL |