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Part Number

Part Number:
NSN:
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Item Name:
MICROCIRCUIT , DIGITAL

Definition:

A MICROCIRCUIT SPECIFICALLY DESIGNED TO GENERATE, MODIFY, OR PROCESS ELECTRICAL SIGNALS WHICH OPERATE WITH TWO DISTINCT OR BINARY STATES. THESE STATES ARE COMMONLY REFERRED TO AS ON AND OFF, TRUE AND FALSE, HIGH AND LOW, OR "1" AND "0".

CAGE Information

Code Company
01295 TEXAS INSTRUMENTS INCORPORATED DBA T

Characteristics (Decoded)

MRC Requirements Statement Clear Text Reply
CQSZ INCLOSURE CONFIGURATION DUAL-IN-LINE
CQSZ INCLOSURE CONFIGURATION DUAL-IN-LINE
CTFT CASE OUTLINE SOURCE AND DESIGNATOR T0-116 JOINT ELECTRON DEVICE ENGINEERING COUNCIL
AEHX MAXIMUM POWER DISSIPATION RATING 220.0 MILLIWATTS
AFGA OPERATING TEMP RANGE +0.0/+70.0 DEG CELSIUS
ADAU BODY HEIGHT 0.140 INCHES MINIMUM AND 0.180 INCHES MAXIMUM
AFJQ STORAGE TEMP RANGE -65.0/+150.0 DEG CELSIUS
CBBL FEATURES PROVIDED EDGE TRIGGERED AND MEDIUM SPEED AND MEDIUM POWER AND POSITIVE OUTPUTS AND MONOLITHIC AND HERMETICALLY SEALED AND W/CLEAR
ADAT BODY WIDTH 0.220 INCHES MINIMUM AND 0.280 INCHES MAXIMUM
CQZP INPUT CIRCUIT PATTERN DUAL 4 INPUT
CQSJ INCLOSURE MATERIAL CERAMIC AND GLASS
CQWX OUTPUT LOGIC FORM TRANSISTOR-TRANSISTOR LOGIC
CZEQ TIME RATING PER CHACTERISTIC 39.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 50.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT
CSSL DESIGN FUNCTION AND QUANTITY 2 FLIP-FLOP, J-K, CLOCKED AND 2 FLIP-FLOP, J-K, MASTER SLAVE
TEST TEST DATA DOCUMENT 17773-11253319 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING)
ADAQ BODY LENGTH 0.660 INCHES MINIMUM AND 0.785 INCHES MAXIMUM

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