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Part Number

Part Number:
NSN:
NIIN:
Item Name:
MICROCIRCUIT , DIGITAL

Definition:

A MICROCIRCUIT SPECIFICALLY DESIGNED TO GENERATE, MODIFY, OR PROCESS ELECTRICAL SIGNALS WHICH OPERATE WITH TWO DISTINCT OR BINARY STATES. THESE STATES ARE COMMONLY REFERRED TO AS ON AND OFF, TRUE AND FALSE, HIGH AND LOW, OR "1" AND "0".

CAGE Information

Code Company
01295 TEXAS INSTRUMENTS INCORPORATED DBA T

Federal Supply Class

Title

MICROCIRCUITS, ELECTRONIC

Inclusions:

INCLUDES INTEGRATED CIRCUIT DEVICES; INTEGRATED CIRCUIT MODULES, INTEGRATED ELECTRONIC DEVICES: HYBRID, MAGNETIC, MOLECULAR, OPTO-ELECTRONIC, AND THIN FILM.

Exclusions:

EXCLUDES SINGLE CIRCUIT ELEMENTS SUCH AS CAPACITORS; RESISTORS; DIODES AND TRANSISTORS; PRINTED CIRCUIT BOARDS AND CIRCUIT CARD ASSEMBLIES; AND FILTERS AND NETWORKS.

Characteristics (Decoded)

MRC Requirements Statement Clear Text Reply
CQSZ INCLOSURE CONFIGURATION DUAL-IN-LINE
CQSZ INCLOSURE CONFIGURATION DUAL-IN-LINE
CBBL FEATURES PROVIDED HERMETICALLY SEALED AND POSITIVE OUTPUTS AND MONOLITHIC AND W/OPEN COLLECTOR
TTQY TERMINAL TYPE AND QUANTITY 14 PRINTED CIRCUIT
AFGA OPERATING TEMP RANGE +0.0/+70.0 DEG CELSIUS
ADAQ BODY LENGTH 0.750 INCHES MINIMUM AND 0.785 INCHES MAXIMUM
AEHX MAXIMUM POWER DISSIPATION RATING 40.0 MILLIWATTS
ADAT BODY WIDTH 0.240 INCHES MINIMUM AND 0.280 INCHES MAXIMUM
ADAU BODY HEIGHT 0.140 INCHES MINIMUM AND 0.180 INCHES MAXIMUM
AFJQ STORAGE TEMP RANGE -65.0/+150.0 DEG CELSIUS
TEST TEST DATA DOCUMENT 12436-V00365 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING)
CZEN VOLTAGE RATING AND TYPE PER CHARACTERISTIC -0.5 VOLTS MINIMUM POWER SOURCE AND 5.5 VOLTS MAXIMUM POWER SOURCE
CQSJ INCLOSURE MATERIAL CERAMIC AND GLASS
CQWX OUTPUT LOGIC FORM TRANSISTOR-TRANSISTOR LOGIC
CQZP INPUT CIRCUIT PATTERN QUAD 2 INPUT
CZEQ TIME RATING PER CHACTERISTIC 29.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 15.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT
CWSG TERMINAL SURFACE TREATMENT SOLDER
CSSL DESIGN FUNCTION AND QUANTITY 4 GATE, NAND

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